1. B. Zhao and Y. Lao, "CLPA: Clean-Label Poisoning Availability Attacks Using Generative Adversarial Nets," Proc. of Thirty-Sixth AAAI Conference on Artificial Intelligence (AAAI-22), February 2022.

2. J. Clements and Y. Lao, "DeepHardMark: Towards Watermarking Neural Network Hardware," Proc. of Thirty-Sixth AAAI Conference on Artificial Intelligence (AAAI-22), February 2022.

3. Y. Lao, W. Zhao, P. Yang, and P. Li, "DeepAuth: A DNN Authentication Framework by Model-Unique and Fragile Signature Embedding," Proc. of Thirty-Sixth AAAI Conference on Artificial Intelligence (AAAI-22), February 2022.

4. Y. Lao, P. Yang, W. Zhao, and P. Li, "Identification for Deep Neural Network: Simply Adjusting Few Weights," Proc. of IEEE International Conference on Data Engineering (ICDE), May 2022.

5. B. Zhao and Y. Lao, "Towards Class-Oriented Poisoning Attacks Against Neural Networks," Proc. of Winter Conference on Applications of Computer Vision (WACV), January 2022.

6. K. Doan, Y. Lao, and P. Li, "Backdoor Attack with Imperceptible Input and Latent Modification," Proc. of Neural Information Processing Systems (NeurIPS), December 2021.

7. W. Tan, A. Wang, Y. Lao, X. Zhang, and K.K. Parhi, "Pipelined High-throughput NTT Architecture for Lattice-based Cryptography," Proc. of Asian Hardware Oriented Security and Trust Symposium (AsianHOST), December 2021.

8. J. Clements, Y. Yang, A. Sharma, H. Hu, and Y. Lao, "Rallying Adversarial Techniques against Deep Learning for Network Security," Proc. of IEEE Symposium Series on Computational Intelligence (SSCI), December 2021.

9. P. Yang, Y. Lao, and P. Li, "Robust Watermarking for Deep Neural Networks via Bi-level Optimization," Proc. of International Conference on Computer Vision (ICCV), October 2021.

10. K. Doan, Y. Lao, W. Zhao, and P. Li, "LIRA: Learnable, Imperceptible and Robust Backdoor Attacks," Proc. of International Conference on Computer Vision (ICCV), October 2021.

11. F. B. Tarik, A. Famili, Y. Lao, and J. D. Ryckman, "Analysis of 56 Physically Unclonable Silicon Photonic Moire Quasicrystal Interferometers," Proc. of CLEO: Science and Innovations, May 2021.

12. X. Wang, Y. Lao, Y. Gu, and B. Fang, "Haptic Glove for Object Recognition and Hand Motion Detection," Proc. of 2020 China Automation Congress (CAC), November 2020.

13. W. Tan, A. Wang, Y. Xu, and Y. Lao, "Area-efficient Pipelined VLSI Architecture for Polar Decoder," Proc. of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 352-357, July 2020.

14. J. Sun, N. Sharma, J. Chakareski, N. Mastronarde, and Y Lao, "Action Evaluation Hardware Accelerator for Next-Generation Real-Time Reinforcement Learning in Emerging IoT Systems," Proc. of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 428-433, July 2020.

15. A. Famili, C. Pathiravasam, Y, Lao, and G. K. Venayagamoorthy, "Device-Specific Signature Generation Technique for Smart Grid Device," Proc. of IEEE Power Systems Conference (PSC), pp. 1-5, March 2020.

16. W. Tan, G. Hu, B. Case, S. Gao, and Y. Lao, "An Efficient Polynomial Multiplier Architecture for the Bootstrapping Algorithm in A Fully Homomorphic Encryption Scheme," 2019 IEEE International Workshop on Signal Processing Systems, pp. 85-90, October 2019.

17. L. Qiu, Z. Zhang, J. Calhoun, and Y. Lao, "Towards Data-Driven Approximate Circuit Design," Proc. of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 397-402, July 2019.

18. A. Sharma, X. Zhang, and Y. Lao, "Hardware Obfuscation Through Reconfiguration Finite Field Arithmetic Units," Proc. of 2019 IEEE International Symposium on Circuits and Systems (ISCAS), May 2019.

19. J. Clements and Y. Lao, "Hardware Trojan Design on Neural Networks," Proc. of 2019 IEEE International Symposium on Circuits and Systems (ISCAS), May 2019.

20. J. Clements and Y. Lao, "Backdoor Attacks on Neural Network Operations," Proc. of 2018 6th IEEE Global Conference on Signal and Information Processing, pp. 1154-1158, November 2018.

21. B. Zhao and Y. Lao, "Resilience of Pruned Neural Network Against Poisoning Attack," Proc. of 2018 IEEE International Conference on Malicious and Unwanted Software, pp. 78-83, October 2018.

22. S. Kai, Y. Shen, Y. Lao, Z. Zhang, X. You and Chuan Zhang, "A New Error Correction Scheme for Physical Unclonable Function," Proc. of 2018 IEEE Asia Pacific Conference on Circuits and Systems, pp. 374-377, October 2018.

23. Y. Wen and Y. Lao, "Efficient PUF Error Correction Through Response Weighting," Proc. of 2018 IEEE International Midwest Symposium on Circuits and Systems, August 2018.

24. X. Wang and Y. Lao, "Utilizing Inherent Randomness in Stochastic Computing," Proc. of 2018 IEEE International Midwest Symposium on Circuits and Systems, August 2018.

25. Y. Wen and Y. Lao, "PUF Modeling Attack using Active Learning," Proc. of 2018 IEEE International Symposium on Circuits and Systems (ISCAS), May 2018.

26. L. Qiu and Y. Lao, "A Systematic Method for Approximate Circuit Design Using Feature Selection," Proc. of 2018 IEEE International Symposium on Circuits and Systems (ISCAS), May 2018.

27. Y. Xu, Y. Lao, W. Liu, X. You, and C. Zhang, "DC MUX PUF: A Highly Reliable Feed-Back MUX PUF Based on Measuring Duty Cycle," Proc. of 11th International collaboration Symposium on Information, Production and Systems, pp. 883-886, November 2017.

28. K. Sun, Y. Lao, W. Liu, X. You, and C. Zhang, "Application of LDPC Codes on PUF Error Correction Based on Code-offset Construction," Proc. of 11th International collaboration Symposium on Information, Production and Systems, pp. 867-870, November 2017.

29. Y. Wen and Y. Lao, "Efficient Fuzzy Extractor Implementations for PUF Based Authentication," Proc. of  2017 IEEE International Conference on Malicious and Unwanted Software, pp. 119-125, October 2017.

30. Y. Wen and Y. Lao, "Enhancing PUF Reliability by Machine Learning," Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1-4, May 2017.

31. Y. Lao and K. K. Parhi, "Data-Canonic Real FFT Flow-Graphs for Composite Lengths," Proc. of  2016 IEEE International Workshop on Signal Processing Systems, pp. 189-194, October 2016.

32. C. Zhou, S. Satapathy, Y. Lao, K.K. Parhi and C.H. Kim, "Soft Response Generation and Thresholding Strategies for Linear and Feed-Forward MUX PUFs," Proc. 2016 International Symposium on Low Power Electronics and Design (ISLPED), pp. 124-129, Aug. 2016. (Best Paper Award)

33. S. V. S. Avvaru, C. Zhou, S. Satapathy, Y. Lao, C. H. Kim and K. K. Parhi, "Estimating Delay Differences of Arbiter PUFs Using Silicon Data," Proc. of 2016 Design, Automation and Test in Europe (DATE), March 2016.

34. Y. Lao and K. K. Parhi, "Canonic Real-Valued Radix-2n FFT Computations," Proc. of 2015 Asilomar Conference on Signals, Systems and Computers, November 2015.

35. G. C. Shanmugam, Y. Lao, and K. K. Parhi, "An Obfuscated Radix-2 Real FFT Architecture," Proc. of 40th IEEE International Conference on Acoustics, Speech and Signal Processing, April 2015.

36. M. Parhi, Y. Lao, and K. K. Parhi, "Canonic Real-Valued FFT Structures," Proc. of Asilomar Conference on Signals, Systems and Computers, November 2014.

37. Q. Tang, B. Kim, Y. Lao, K. K. Parhi, and C. H. Kim, "True Random Number Generator Circuits based on Single- and Multi-Phase Beat Frequency Detection," Proc. of IEEE Customs Integrated Circuits Conference, pp. 1-4, September 2014.

38. Y. Lao and K. K. Parhi, "Protecting DSP Circuits Through Obfuscation," Proc. of IEEE International Symposium on Circuits and Systems, pp. 798-801, June 2014.

39. Y. Lao and K. K. Parhi, "Reconfigurable Architectures for Silicon Physical Unclonable Functions," Proc. of IEEE International Conference on Electro Information Technology, pp. 1-7, May 2011.

40. Y. Lao and K. K. Parhi, "Novel Reconfigurable Silicon Physical Unclonable Functions," Proc. of Workshop on Foundations of Dependable and Secure Cyber-Physical Systems, pp. 30-36, April 2011.

1. A. Wang, W. Tan, Y. Wen, and Y. Lao, "NoPUF: A Novel PUF Design Framework Towards Modeling Attack," IEEE Transactions on Circuits and Systems I, 68(6), pp. 2508-2521, 2021.

2. W. Tan, B. Case, A. Wang, S. Gao, and Y. Lao, "High-Speed Modular Multiplier for Lattice-Based Cryptosystems," IEEE Transactions on Circuits and Systems II, 68(8), pp. 2927-2931, 2021.

3. W. Tan, B. Case, G. Hu, S. Gao, and Y. Lao, "An Ultra-Highly Parallel Polynomial Multiplier for the Bootstrapping Algorithm in a Fully Homomorphic Encryption Scheme," Journal of Signal Processing Systems, pp. 1-14, 2020.

4. F. B. Tarik, A. Famili, Y. Lao, and J. D. Ryckman, "Robust Optical Physical Unclonable Function Using Disordered Photonic Integrated Circuits," Nanophotonics, 9(9), pp. 2817-2828, 2020.

5. Y. Xu, Y. Lao, W. Liu, Z. Zhang, X. You, and C. Zhang, "Mathematical Modeling Analysis of Strong Physical Unclonable Functions," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 32(12), pp. 4426-4438, 2020.

6. X. Zhang and Y. Lao, "On the Construction of Composite Finite Fields for Hardware Obfuscation," IEEE Transactions on Computers, 68(9), pp. 1353-1364, 2019.

7. Y. Lao and K. K. Parhi, "Canonic Composite Length Real-Valued FFT," Journal of VLSI Signal Processing Systems, vol. 90, pp. 1401–1414, 2018.

8. Y. Lao and K. K. Parhi, "Canonic FFT Flow-Graphs for Real-Valued Even/Odd Symmetric Inputs," EURASIP Journal on Advances in Signal Processing, vol. 2017(1), p. 45, 2017.

9. Y. Lao, B. Yuan, C. H. Kim and K. K. Parhi, "Reliable PUF-based Local Authentication with Self-Correction," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36(2), pp. 201-213, February 2017.

10. Y. Lao, Q. Tang, C. H. Kim, and K. K. Parhi, "Beat Frequency Detector based True Random Number Generator: Statistical Modeling and Analysis," ACM Journal on Emerging Technologies in Computing Systems, 13(1), Article 9, December 2016.

11. Y. Lao and K. K. Parhi, "Obfuscating DSP Circuits via High-Level Transformations," IEEE Transactions on Very Large Scale Integration Systems, 23(5), pp. 819-830, May 2015. (IEEE CAS Society Very Large Scale Integration Best Paper Award)

12. Y. Lao and K. K. Parhi, "Statistical Analysis of MUX-based Physical Unclonable Functions," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 33(5), pp. 649-662, May 2014.

13. M. Ayinala, Y. Lao, and K. K. Parhi, "An In-Place FFT Architecture for Real-Valued Signals," IEEE Transactions on Circuits and Systems II, 60(10), pp. 652-656, October 2013.